Diode Circuits, Amplifiers, Op-Amps, Active Filters and Digital Logic

Section 9 of the GATE Electrical Engineering (EE) paper: the analog and digital electronics that surround every power and control system with sensing, conditioning and logic. Start with simple diode circuits and amplifier biasing and frequency response; then feedback amplifiers, oscillators, the operational amplifier and the active filters built from it; then combinational and sequential logic, multiplexers and demultiplexers; and finally the mixed-signal building blocks — Schmitt triggers, sample-and-hold circuits, and A/D and D/A converters — that connect the analog and digital worlds.

1. Diode circuits, amplifier biasing and frequency response

A clipper circuit removes part of a waveform above or below a reference level using a diode in series or shunt with a bias source, while a clamper shifts a waveform's DC level up or down without changing its shape, using a diode and capacitor that charges to hold the new reference — the distinguishing test is exactly this: a clipper changes SHAPE, a clamper changes LEVEL only. A rectifier (half-wave or full-wave, with a bridge being the standard full-wave configuration needing no centre-tapped transformer) converts AC to a pulsating DC, and a capacitor filter smooths the output at the cost of ripple that grows with load current and shrinks with a larger filter capacitor.

A BJT or MOSFET amplifier is biased first to set a stable, temperature-tolerant DC operating (quiescent) point in the active region, before AC signal analysis considers the small-signal equivalent circuit built around that point — the two analyses (DC bias, AC small-signal) are always done separately, because they use different, incompatible circuit models (DC sources become zero for AC analysis, coupling and bypass capacitors become zero-impedance shorts for AC but open circuits for DC). Frequency response of a single-stage amplifier is limited at low frequency by coupling and bypass capacitors (whose reactance rises as frequency falls) and at high frequency by internal device capacitances (whose reactance falls as frequency rises), giving a mid-band region of flat, maximum gain bounded by two corner frequencies.

⚠️ Clipping the top is not the same as clamping up
A diode clipper's output shape genuinely differs from its input above (or below) the clipping level — information is discarded, which is why a clipper is used to protect a circuit from an overvoltage or to reshape a waveform. A clamper's output is a rigid, undistorted copy of the input, merely riding on a new DC level — no part of the waveform's shape is altered or lost, which is why a clamper is used (for example, in a TV receiver's sync-restoration circuit) precisely where preserving shape while fixing a reference level matters.

2. Oscillators, feedback amplifiers, op-amps and active filters

A sinusoidal oscillator is an amplifier with positive feedback engineered to satisfy the Barkhausen criterion at exactly one frequency: loop gain magnitude equal to 1 and loop phase shift equal to 0 (or a multiple of 360 degrees) — below this the oscillation dies out, above it grows until non-linearity (saturation) limits the amplitude, and exactly at it a sustained sinusoid results. An ideal operational amplifier has infinite open-loop gain, infinite input impedance and zero output impedance, which is the basis of the 'virtual short' approximation used to analyse every standard op-amp circuit: with negative feedback, the two input terminals are assumed to sit at the same voltage even though no current actually flows between them.

Standard op-amp circuits
CircuitFunction
Inverting/non-inverting amplifiergain set purely by external resistor ratio, negative feedback
Integratoroutput proportional to the time-integral of the input
Differentiatoroutput proportional to the rate of change of the input
Comparatoropen-loop (or positive feedback), output saturates high or low based on which input is larger
⚠️ A practical differentiator always needs a series resistor
An ideal differentiator's gain rises without limit as frequency increases (since its impedance path is a capacitor whose reactance falls with frequency), which makes it amplify high-frequency noise catastrophically and can even make the circuit unstable — every practical differentiator adds a small series resistor ahead of the input capacitor to cap the high-frequency gain at a safe value. An integrator has no such problem, since its gain FALLS with frequency instead, which is exactly the opposite and inherently noise-attenuating behaviour — this asymmetry is why active filters lean on integrator-like (Sallen-Key, multiple-feedback) topologies rather than differentiator-like ones.

3. Combinational and sequential logic, multiplexers and demultiplexers

A combinational circuit's output depends only on its present inputs, with no memory of the past (adders, decoders, multiplexers, encoders), while a sequential circuit's output depends on present inputs AND on a stored internal state (flip-flops, counters, registers), which is exactly what gives it memory — the state itself is held by feedback inside the circuit (typically a pair of cross-coupled gates or a clocked latch), not by any external component. A multiplexer selects one of several data inputs to route to a single output based on select lines (2^n inputs need n select lines), and a demultiplexer does the reverse, routing a single input to one of several outputs — the two are functional inverses of each other.

Flip-flop truth behaviour, essentials
TypeKey behaviour
SRboth inputs high simultaneously is a forbidden (invalid) state
Doutput simply follows the D input at the clock edge, no forbidden state
JKresolves SR's forbidden case: both inputs high makes the output TOGGLE
Toutput toggles on every active clock edge when T is high; holds when T is low
🎯 JK exists specifically to fix SR's forbidden state
An SR latch's S=R=1 case is forbidden because both cross-coupled outputs try to go low simultaneously, and the result when the inputs then both return to 0 depends unpredictably on tiny propagation-delay differences between the two gates (a race condition). JK adds feedback from the outputs back into the input gating so that J=K=1 instead deterministically makes the output TOGGLE, converting an undefined case into a fully specified, useful one — which is exactly why JK is treated as the general-purpose flip-flop and SR mainly as a teaching stepping stone toward it.

4. Schmitt triggers, sample-and-hold circuits, and A/D and D/A converters

A Schmitt trigger is a comparator with positive feedback, giving it two distinct switching thresholds (hysteresis) instead of one — it switches high going up only above the upper threshold, and switches low going down only below the lower threshold. This is precisely what makes it immune to a noisy signal that hovers around a single simple threshold and would otherwise cause many spurious extra transitions on a plain comparator; a Schmitt trigger is the standard 'clean up a noisy digital edge' building block for exactly this reason.

A sample-and-hold circuit acquires (tracks) an analog input during a brief sample period, then freezes (holds) that value on a capacitor while the rest of the conversion circuitry does its work — every practical ADC needs one ahead of it, because most ADC architectures need the input to stay constant for the whole conversion time, while a real-world signal keeps changing. The specific problem this solves is called aperture error: without a hold, a changing input during conversion would make the converted digital code correspond to no single instant of the actual waveform.

A/D converter architectures, the essential trade-off
TypeSpeedComplexity/cost
Flash (parallel comparator)fastest — one clock cycle2^n - 1 comparators, doubles with each added bit
Successive approximation (SAR)moderate — n cycles for n bitsone comparator, one DAC, standard general-purpose choice
Dual-slope (integrating)slowestvery simple, high accuracy, immune to component drift
🧠 The speed/complexity trade-off is the whole story
Every ADC architecture question in this topic reduces to the same trade-off: flash trades exploding comparator count for maximum speed (used where speed is paramount, like digitising a video signal), successive-approximation trades a fixed n-cycle latency for moderate hardware and is the default general-purpose choice, and dual-slope trades speed away entirely for the drift-immune accuracy a precision voltmeter needs. Recognising which corner of this trade-off a question describes, rather than memorising each architecture's internal diagram, answers most questions on this topic directly.

Key takeaways

  • A clipper genuinely changes a waveform's shape (discarding part of it); a clamper preserves shape exactly and only shifts its DC level — the two are tested by exactly this distinction.
  • A sinusoidal oscillator satisfies the Barkhausen criterion, loop gain = 1 and loop phase = 0 (or a multiple of 360 degrees), at exactly the oscillation frequency.
  • A practical differentiator needs a series resistor to cap its otherwise unlimited high-frequency gain; an integrator has no such problem since its gain falls, not rises, with frequency.
  • JK's J=K=1 toggle case exists specifically to give a deterministic outcome for SR's forbidden, race-prone S=R=1 case.
  • Flash ADC trades comparator count for maximum speed; SAR trades a fixed n-cycle latency for moderate hardware (the default choice); dual-slope trades speed entirely for drift-immune accuracy.

Practice questions (9)

Attempt each one before opening the answer. Every explanation names the tempting wrong option as well as the right one, because that is where marks are lost.

  1. A clamper circuit, as distinct from a clipper, is characterised by

    1. discarding part of the waveform above or below a threshold
    2. shifting the waveform's DC level while preserving its exact shape
    3. converting AC to DC
    4. amplifying the waveform's peak value
    Show answer

    Answer: B — shifting the waveform's DC level while preserving its exact shape

    A clamper's diode-capacitor network shifts the entire waveform up or down to a new DC reference without altering its shape at all — a clipper is the one that discards part of the shape, and neither device is a rectifier or an amplifier by itself.
  2. DC bias analysis and AC small-signal analysis of a BJT amplifier are always kept separate because

    1. they use identical circuit models with no difference at all
    2. DC sources are zeroed and reactive elements are treated differently (short or open) in the two analyses
    3. AC analysis is only valid at DC (zero frequency)
    4. BJTs cannot be biased and driven with AC simultaneously
    Show answer

    Answer: B — DC sources are zeroed and reactive elements are treated differently (short or open) in the two analyses

    The two analyses use genuinely incompatible simplified models — DC sources become zero for AC small-signal analysis while coupling/bypass capacitors become shorts, whereas for DC bias analysis it is the opposite (capacitors are open, DC sources are active) — so combining them in one pass is not meaningful; every practical amplifier IS biased and driven with AC simultaneously, just analysed in two separate steps.
  3. The Barkhausen criterion for sustained sinusoidal oscillation requires

    1. loop gain magnitude greater than 1 and loop phase 90 degrees
    2. loop gain magnitude exactly 1 and loop phase 0 (or a multiple of 360 degrees)
    3. loop gain magnitude less than 1 and any phase
    4. negative feedback with loop gain 0
    Show answer

    Answer: B — loop gain magnitude exactly 1 and loop phase 0 (or a multiple of 360 degrees)

    Barkhausen's criterion is exactly loop gain magnitude 1 (unity) with loop phase shift 0 degrees (or a multiple of 360) at the oscillation frequency — greater than 1 causes growing amplitude until saturation limits it, less than 1 causes the oscillation to die out, and 0 loop gain (option D) cannot sustain anything at all.
  4. A practical op-amp differentiator circuit adds a small resistor in series with its input capacitor chiefly to

    1. increase the DC gain
    2. cap the otherwise unlimited high-frequency gain and improve noise immunity
    3. convert it into an integrator
    4. remove the need for negative feedback
    Show answer

    Answer: B — cap the otherwise unlimited high-frequency gain and improve noise immunity

    An ideal differentiator's gain rises without bound as frequency increases, amplifying high-frequency noise and risking instability; the added series resistor caps this gain at high frequency to a safe, finite value, at some cost to ideal differentiating behaviour at the very highest frequencies.
  5. Which of the following are correctly true of combinational versus sequential circuits?

    1. A combinational circuit's output depends only on present inputs.
    2. A sequential circuit's memory is held by feedback inside the circuit, not by an external component alone.
    3. A multiplexer and a demultiplexer perform the same function.
    4. A decoder is a sequential circuit.
    Show answer

    Answer: A — A combinational circuit's output depends only on present inputs.; B — A sequential circuit's memory is held by feedback inside the circuit, not by an external component alone.

    The first two are correct definitions. A multiplexer and demultiplexer are functional INVERSES of each other (many-to-one versus one-to-many), not the same function, and a decoder is a combinational circuit (its output depends only on the present input code, with no stored state) — not sequential.
  6. In a JK flip-flop, the input combination J=1, K=1 at an active clock edge causes the output to

    1. become an invalid, forbidden state
    2. toggle to the opposite of its previous state
    3. hold its previous state unchanged
    4. always go to logic 0
    Show answer

    Answer: B — toggle to the opposite of its previous state

    J=K=1 is specifically defined to make the JK flip-flop toggle, which is exactly the case that was left forbidden and race-prone in the simpler SR latch — this deterministic toggle behaviour is the entire reason JK is preferred as the general-purpose flip-flop.
  7. A Schmitt trigger differs from an ordinary comparator chiefly in that it has

    1. a single, sharply defined switching threshold
    2. two distinct thresholds (hysteresis), immune to noise around a single level
    3. no feedback of any kind
    4. an output that is always analog
    Show answer

    Answer: B — two distinct thresholds (hysteresis), immune to noise around a single level

    A Schmitt trigger's positive feedback creates two distinct switching thresholds (upper and lower), so a noisy signal hovering around a single level does not cause spurious multiple transitions the way it would on an ordinary single-threshold comparator — this hysteresis is precisely its defining feature.
  8. A sample-and-hold circuit is placed ahead of an ADC chiefly to prevent

    1. quantisation error
    2. aperture error from the input changing during the conversion time
    3. aliasing in the frequency domain
    4. gain error of the comparator
    Show answer

    Answer: B — aperture error from the input changing during the conversion time

    Without a hold, an input that keeps changing during the finite conversion time would make the resulting digital code correspond to no single well-defined instant of the waveform — this is aperture error, distinct from quantisation error (a resolution limit) and aliasing (a sampling-rate issue handled upstream by an anti-aliasing filter).
  9. A flash ADC resolves n bits using 2^n - 1 comparators. For n = 4 bits, the number of comparators needed is ___

    Numerical answer — type the value.

    Show answer

    Answer: 15

    2^4 - 1 = 16 - 1 = 15 comparators — the count doubles roughly with each added bit, which is exactly why flash converters are used only for a small number of bits despite being the fastest architecture available.